diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile index 1f06670..0d423e2 100644 --- a/arch/powerpc/Makefile +++ b/arch/powerpc/Makefile @@ -160,7 +160,7 @@ all: zImage CPPFLAGS_vmlinux.lds := -Upowerpc -BOOT_TARGETS = zImage zImage.initrd uImage zImage% dtbImage% treeImage.% cuImage.% simpleImage.% +BOOT_TARGETS = zImage zImage.initrd uImage zImage% dtbImage% treeImage.% cuImage.% komImage.% simpleImage.% PHONY += $(BOOT_TARGETS) @@ -179,6 +179,7 @@ define archhelp @echo ' cuImage.
- Backwards compatible U-Boot image for older' @echo ' versions which do not support device trees' @echo ' dtbImage.
- zImage with an embedded device tree blob' + @echo ' komImage.
- Support for Kontron bootloader (aka NetBootLoader)' @echo ' simpleImage.
- Firmware independent image.' @echo ' treeImage.
- Support for older IBM 4xx firmware (not U-Boot)' @echo ' install - Install kernel using' diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index 3d3daa6..128fb03 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile @@ -70,7 +70,7 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \ - cuboot-acadia.c + cuboot-acadia.c kom_fpga.c reloc-head.S src-boot := $(src-wlib) $(src-plat) empty.c src-boot := $(addprefix $(obj)/, $(src-boot)) @@ -267,6 +267,7 @@ image-$(CONFIG_TQM8560) += cuImage.tqm8560 image-$(CONFIG_SBC8548) += cuImage.sbc8548 image-$(CONFIG_SBC8560) += cuImage.sbc8560 image-$(CONFIG_KSI8560) += cuImage.ksi8560 +image-$(CONFIG_EB8541) += komImage.eb8541 # Board ports in arch/powerpc/platform/embedded6xx/Kconfig image-$(CONFIG_STORCENTER) += cuImage.storcenter @@ -285,8 +286,9 @@ image-y += $(subst ",,$(CONFIG_EXTRA_TARGETS)) initrd- := $(patsubst zImage%, zImage.initrd%, $(image-n) $(image-)) initrd-y := $(patsubst zImage%, zImage.initrd%, \ $(patsubst dtbImage%, dtbImage.initrd%, \ + $(patsubst komImage%, komImage.initrd%, \ $(patsubst simpleImage%, simpleImage.initrd%, \ - $(patsubst treeImage%, treeImage.initrd%, $(image-y))))) + $(patsubst treeImage%, treeImage.initrd%, $(image-y)))))) initrd-y := $(filter-out $(image-y), $(initrd-y)) targets += $(image-y) $(initrd-y) @@ -328,6 +330,12 @@ $(obj)/cuImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits) $(obj)/cuImage.%: vmlinux $(obj)/%.dtb $(wrapperbits) $(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb) +$(obj)/komImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits) + $(call if_changed,wrap,kom-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz) + +$(obj)/komImage.%: vmlinux $(obj)/%.dtb $(wrapperbits) + $(call if_changed,wrap,kom-$*,,$(obj)/$*.dtb) + $(obj)/simpleImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits) $(call if_changed,wrap,simpleboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz) diff --git a/arch/powerpc/boot/dts/eb8541.dts b/arch/powerpc/boot/dts/eb8541.dts new file mode 100644 index 0000000..98f0c71 --- /dev/null +++ b/arch/powerpc/boot/dts/eb8541.dts @@ -0,0 +1,441 @@ +/* + * EB8541 Device Tree Source + * + * Copyright 2009 Jérôme Pouiller + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + model = "EB8541"; + compatible = "EB8541", "EB854x"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + serial4 = &serial4; + serial5 = &serial5; + pci0 = &pci0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8541@0 { + device_type = "cpu"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; // Filled in bootloader: 33MHz + bus-frequency = <0>; // Filled in bootloader: 264MHz + clock-frequency = <0>; // Filled in bootloader: 660MHz + next-level-cache = <&L2>; + }; + }; + + memory { + device_type = "memory"; + // Declare only 128Mo. This value will be overidden in bootloader + reg = <0x0 0x8000000>; + }; + + sram { + device_type = "sram"; + reg = <0xff800000 0x100000>; // Can be overidden by Bootloader + }; + + chosen { + linux,stdout-path = "/soc8541@e0000000/serial@4500"; + bootargs = "console=ttyS0,9600 loglevel=7"; + }; + + soc8541@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + // 8541 has only 1M of memory mapped device but EB8541 have devices + // between 0xfffe0000 and 0xffffffff (UARTs, CAN, IDE, ROM) + ranges = <0x0 0xffe00000 0x200000>; + reg = <0xffe00000 0x200000>; // CCSRBAR + bus-frequency = <0>; + + memory-controller@2000 { + compatible = "fsl,8541-memory-controller"; + reg = <0x2000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <18 2>; + }; + + L2: l2-cache-controller@20000 { + compatible = "fsl,8541-l2-cache-controller"; + reg = <0x20000 0x1000>; + cache-line-size = <32>; // 32 bytes + cache-size = <0x40000>; // L2, 256K + interrupt-parent = <&mpic>; + interrupts = <16 2>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + dfsrr; + eeprom@50 { + compatible = "catalyst,24c64"; + reg = <0x50>; + }; + rtc@68 { + compatible = "dallas,m41t81"; + reg = <0x68>; + }; + sensor@48 { + compatible = "ns,lm75"; + reg = <0x48>; + }; + }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8541-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8541-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8541-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8541-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + + ide { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1E0000 0x2 + 0x1E8003 0xE + 0x1E801D 0x2>; + device_type = "kom-ide"; + interrupt-parent = <&mpic>; + interrupts = <11 1>; + }; + + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; + interrupts = <5 1>; + reg = <0x0>; + device_type = "ethernet-phy"; + }; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; + interrupts = <5 1>; + reg = <0x1>; + device_type = "ethernet-phy"; + }; + }; + + enet0: ethernet@24000 { + cell-index = <0>; + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; // Filled by bootloader + interrupts = <29 2 30 2 34 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy0>; + }; + + enet1: ethernet@25000 { + cell-index = <1>; + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; // Filled by bootloader + interrupts = <35 2 36 2 40 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy1>; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <264000000>; // Should be filled in bootloader + interrupts = <42 2>; + interrupt-parent = <&mpic>; + no-probe; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <264000000>; // Should be filled in bootloader + interrupts = <42 2>; + interrupt-parent = <&mpic>; + no-probe; + }; + + serial2: serial@1F8000 { + cell-index = <0>; + device_type = "serial"; + compatible = "st16654"; + reg = <0x1F8000 0x8>; + clock-frequency = <14745600>; + //interrupts = <6 3>; + interrupt-parent = <&mpic>; + }; + + serial3: serial@1F8008 { + cell-index = <1>; + device_type = "serial"; + compatible = "st16654"; + reg = <0x1F8008 0x8>; + clock-frequency = <14745600>; + //interrupts = <6 3>; + interrupt-parent = <&mpic>; + }; + + serial4: serial@1F8010 { + cell-index = <0>; + device_type = "serial"; + compatible = "st16654"; + reg = <0x1F8010 0x8>; + clock-frequency = <14745600>; + //interrupts = <7 1>; + interrupt-parent = <&mpic>; + }; + + serial5: serial@1F8018 { + cell-index = <1>; + device_type = "serial"; + compatible = "st16654"; + reg = <0x1F8018 0x8>; + clock-frequency = <14745600>; + //interrupts = <7 1>; + interrupt-parent = <&mpic>; + }; + +/* Should be present, but does not respond. Wore, talico driver produce kernel panic. + crypto@30000 { + compatible = "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x7e>; + fsl,descriptor-types-mask = <0x01010ebf>; + }; +*/ + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x40000 0x40000>; + compatible = "chrp,open-pic"; + device_type = "open-pic"; + }; +/* Unused + lpcmux: lpcmux@0 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + device_type = "kom,lpc-mux"; + interrupts = <56 2>; + interrupt-parent = <&mpic>; + }; +*/ + + fpga: fpga@1fa000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x1fa000 0x13>; + compatible = "kom,fpga"; + interrupts = <9 1 + 0 1>; + interrupt-parent = <&mpic>; + }; + + cpm@919c0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8541-cpm", "fsl,cpm2"; + reg = <0x919c0 0x30>; + ranges; + + muram@80000 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x80000 0x10000>; + + data@0 { + compatible = "fsl,cpm-muram-data"; + reg = <0x0 0x2000 0x9000 0x1000>; + }; + }; + + brg@919f0 { + compatible = "fsl,mpc8541-brg", + "fsl,cpm2-brg", + "fsl,cpm-brg"; + reg = <0x919f0 0x10 0x915f0 0x10>; + }; + + cpmpic: pic@90c00 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + interrupts = <46 2>; + interrupt-parent = <&mpic>; + reg = <0x90c00 0x80>; + compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic"; + }; + + mdio@90d60 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,cpm2-mdio-bitbang"; + reg = <0x90d60 0x14>; + fsl,mdio-pin = <18>; + fsl,mdc-pin = <17>; + + phy2: ethernet-phy@4 { + interrupt-parent = <&fpga>; + //interrupts = <0>; // Not used by new driver (Wore: used, but not initialised: dangerous) + reg = <4>; + device_type = "ethernet-phy"; + }; + phy3: ethernet-phy@3{ + interrupt-parent = <&fpga>; + //interrupts = <1>; // Not used by new driver (Wore: used, but not initialised: dangerous) + reg = <3>; + device_type = "ethernet-phy"; + }; + }; + + enet2: ethernet@91300 { + device_type = "network"; + compatible = "fsl,mpc8560-fcc-enet", + "fsl,cpm2-fcc-enet"; + reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>; + local-mac-address = [ 00 00 00 00 00 00 ]; // Filled by bootloader + fsl,cpm-command = <0x12000300>; + interrupts = <0x20 0x8>; + interrupt-parent = <&cpmpic>; + phy-handle = <&phy2>; + }; + + enet3: ethernet@91320 { + device_type = "network"; + compatible = "fsl,mpc8560-fcc-enet", + "fsl,cpm2-fcc-enet"; + reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>; + local-mac-address = [ 00 00 00 00 00 00 ]; // Filled by bootloader + fsl,cpm-command = <0x16200300>; + interrupts = <0x21 0x8>; + interrupt-parent = <&cpmpic>; + phy-handle = <&phy3>; + }; +/* Should be present, but does not respond + i2c@91860 { + compatible = "fsl,cpm2-i2c"; + reg = <0x91860 0x14>; + interrupts = <0x1 0x8>; + interrupt-parent = <&cpmpic>; + fsl,cpm-command = <0x19600000>; //OK + }; +*/ + }; + }; + + pci0: pci@ffe08000 { + cell-index = <0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; + device_type = "pci"; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x1A */ + 0xD000 0x0 0x0 0x1 &mpic 0x4 0x1 + 0xD000 0x0 0x0 0x2 &mpic 0x5 0x1 + + /* IDSEL 0x1B */ + 0xD800 0x0 0x0 0x1 &mpic 0x5 0x1 + 0xD800 0x0 0x0 0x2 &mpic 0x2 0x1 + 0xD800 0x0 0x0 0x3 &mpic 0x3 0x1 + 0xD800 0x0 0x0 0x4 &mpic 0x4 0x1 + + /* IDSEL 0x1C */ + 0xE000 0x0 0x0 0x1 &mpic 0x2 0x1 + 0xE000 0x0 0x0 0x2 &mpic 0x3 0x1 + 0xE000 0x0 0x0 0x3 &mpic 0x4 0x1 + 0xE000 0x0 0x0 0x4 &mpic 0x5 0x1>; + interrupt-parent = <&mpic>; + interrupts = <24 2>; + bus-range = <0 0>; + ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 + 0x01000000 0x0 0x00000000 0xa0000000 0x0 0x01000000>; + clock-frequency = <66666666>; + reg = <0xffe08000 0x1000>; + }; +}; diff --git a/arch/powerpc/boot/kom_fpga.c b/arch/powerpc/boot/kom_fpga.c new file mode 100644 index 0000000..dda046d --- /dev/null +++ b/arch/powerpc/boot/kom_fpga.c @@ -0,0 +1,437 @@ +/* + * Board specific functions for Kontron boards which do not have boot + * monitor support for board information. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + */ +#include "ops.h" +#include "stdio.h" +#include "types.h" +#include "libfdt/libfdt.h" + +// From +#define __stringify_1(x) #x +#define __stringify(x) __stringify_1(x) + +// From +#define mfspr(rn) ({unsigned long rval; \ + asm volatile("mfspr %0," __stringify(rn) \ + : "=r" (rval)); rval;}) +#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) + +#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */ + + +typedef struct kom_fpga_regs { + const u8 board_id; + const u8 sw_compid; + const u8 mem_config; + u8 gp_control; + u8 event; + u8 int_config; + const u8 dev_int_pending; + u8 dev_int_mask; + u8 wd_control; + const u8 board_revision; + u8 i2c_command; + u8 i2c_data; + const u8 lpc_int_pending1; + const u8 lpc_int_pending2; + u8 lpc_int_mask1; + u8 lpc_int_mask2; + u8 lpc_int_polarity1; + u8 lpc_int_polarity2; + u8 logic_update; +} kom_fpga_regs_t; +/* The registers of the onboard FPGA */ +static volatile kom_fpga_regs_t *kom_fpga_base = ((kom_fpga_regs_t *) 0xffffa000); + +/* The E2-Brain modules with netbootld must read the board + * configuration from the board E2PROM as long as the bootloader + * does not provide the board data in a bdinfo structure. + * + * That's quite ugly, as the bootloader writes the detected info + * e.g. SDRAM size into the E2PROM first. + * + * It's an extra I2C bus. So we just need this here on startup + */ + +/* write only bits */ +#define I2C_STRB 0x80 +#define I2C_SACK 0x40 +/* read only bits */ +#define I2C_BUSY 0x80 +#define I2C_GACK 0x40 +/* Commands */ +#define I2C_START 1 +#define I2C_STOP 0 +#define I2C_TX 2 +#define I2C_RX 3 +/* ACK/NACK */ +#define I2C_NACK 0 +#define I2C_ACK 1 + +/* Status and Data address */ +static volatile u8 *i2c_command, *i2c_data; + +/* Write a data byte */ +static inline int i2c_write_byte(u8 data) +{ + /* Wait for ready */ + while (*i2c_command & I2C_BUSY); + /* Write data byte */ + *i2c_data = data; + /* set mode */ + *i2c_command = I2C_TX; + /* set strobe to trigger action */ + *i2c_command = I2C_TX | I2C_STRB; + /* Wait for ready */ + while (*i2c_command & I2C_BUSY); + /* return received ACK bit */ + return (*i2c_command & I2C_GACK); +} + +/* Read a data byte */ +static inline u8 i2c_read_byte(int ack) +{ + /* Wait for ready */ + while (*i2c_command & I2C_BUSY); + /* set mode */ + *i2c_command = I2C_RX | (ack ? I2C_SACK : 0); + /* set strobe to trigger action */ + *i2c_command = I2C_RX | I2C_STRB | (ack ? I2C_SACK : 0); + /* Wait for ready */ + while (*i2c_command & I2C_BUSY); + /* return data */ + return *i2c_data; +} + +/* Select chip */ +static inline int i2c_select(u8 sel) +{ + /* Wait for ready */ + while (*i2c_command & I2C_BUSY); + /* set mode */ + *i2c_command = I2C_START; + /* set strobe to trigger action */ + *i2c_command = I2C_START | I2C_STRB; + return i2c_write_byte(sel); +} + +/* Stop a transaction */ +static inline void i2c_deselect(void) +{ + /* Wait for ready */ + while (*i2c_command & I2C_BUSY); + /* set mode */ + *i2c_command = I2C_STOP; + /* set strobe to trigger action */ + *i2c_command = I2C_STOP | I2C_STRB; +} + +/* Adress fixup for 24Cxx type eeproms */ +#define E24CXX_FIX 0xa0 + +/* Read a specific E2PROM location */ +static int i2c_read(u8 chip, u16 addr, u8 *pBuffer, int count, int wordaddr) +{ + int i; + + if(!count) + return 0; + + /* Send device address. Retry 10 times */ + for(i = 0;;i++) { + if(i2c_select(E24CXX_FIX | ((chip & 7) << 1))) + break; + i2c_deselect(); + if (i > 10) + return -1; + } + /* send address */ + if (wordaddr) + i2c_write_byte(addr >> 8); + i2c_write_byte(addr & 0xff); + i2c_deselect(); + /* select for read */ + if(!i2c_select((E24CXX_FIX | ((chip & 7) << 1)) | 1)) { + i2c_deselect(); + return -1; + } + /* receive the byte(s) */ + do { + *pBuffer++ = i2c_read_byte(count == 1 ? I2C_NACK : I2C_ACK); + } while (--count); + /* deselect chip */ + i2c_deselect(); + return 0; +} + +/* Code for reading the System EEPROM-Values which were put there by + * the NetBtLoader This functionality is available for EB8245 and + * possibly other boards in the future. All fields are 8 bit wide. + * + * Offset Content + * + * 0x0 Board Data 0 + * 0x200 Board Data 1 + * 0x400 Boootloader/Firmware + * 0x600 SPD for SDRAM Interface + * 0x800 Production + * 0xA00-0x1fff Reserved + * + * Board Data 0 + * + * 0x00-0x03 Board ID + * 0x04-0x05 Hardware Index + * 0x06-0x07 Software Index + * 0x08-0x0B Memory size + * 0x0C-0x0F Flash size + * 0x10-0x13 SRAM size + * + * Board Data 1 + * + * 0x00-0x0D Serial number + * 0x0E-0x0F Cpu ID + * 0x10-0x13 Frequency 0 + * 0x14-0x17 Frequency 1 + * 0x18 Number of MACs + * 0x19-0x1E MAC address 0 + * 0x1F-0x24 MAC address 1 + * 0x19+n*6 MAC address n + * 0x19+6*(n+1) CRCH, CRCM, CRCL + */ + +#define DATA1_OFFSET 0x200 +#define MAX_MACS 18 +#define CRC_SIZE 3 +/* CRC code for EEPROM data check */ +#define CRC_POLYNOM 69665 +#define calc_crc(crc,d) crc = ((crc << 8) + d) % CRC_POLYNOM + +struct bd_data0 { + u32 board_id_32; + u16 hw_index; + u16 sw_index; + u32 main_mem_size; + u32 flash_mem_size; + u32 sram_mem_size; +}__attribute__((packed)); + +struct bd_data1 { + char serial_nr[14]; + u16 cpu_id; + u32 freq_0; + u32 freq_1; + u8 num_macs; +}__attribute__((packed)); + +struct bd_data { + struct bd_data0 bd0; + struct bd_data1 bd1; + u8 macs[DATA1_OFFSET][6]; +}; + +/* Get board data from i2c */ +static int get_i2c_board_data(struct bd_data *bd) +{ + int i, macsize; + u16 offs; + u32 crc = 0; + u8 board_crc[CRC_SIZE], *p; + + /* init I2C address bits */ + i2c_command = &kom_fpga_base->i2c_command; + i2c_data = &kom_fpga_base->i2c_data; + + /* Read board data 0 (Bootloader data) */ + if(i2c_read(4, 0,(u8 *)&bd->bd0, sizeof(struct bd_data0), 1)) + return -1; + + /* Read board data 1 (Production data) */ + offs = DATA1_OFFSET; + if(i2c_read(4, offs,(u8 *)&bd->bd1, sizeof(struct bd_data1), 1)) + return -1; + + /* Read MAC addresses */ + offs += sizeof(struct bd_data1); + macsize = bd->bd1.num_macs * 6; + if(i2c_read(4, offs, (u8 *) &bd->macs, macsize, 1)) + return -1; + + /* Read CRC */ + offs += macsize; + if(i2c_read(4, offs, board_crc, CRC_SIZE, 1)) + return -1; + + /* Calc CRC */ + p = (u8 *) &bd->bd1; + for (i = 0; i < (sizeof(struct bd_data1) + macsize); i++) + calc_crc(crc, p[i]); + + /* Apply EEPROM crc */ + p = board_crc; + for (i = 0; i < CRC_SIZE; i++) + calc_crc(crc, p[i]); + + return crc ? -1 : 0; +} + +// From +#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */ +#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ +#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */ +#define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ +#define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ +#define L1CSR1_ICFI 0x00000002 /* Instr Cache Flash Invalidate */ +#define L1CSR1_ICE 0x00000001 /* Instr Cache Enable */ + +// 8541 specific +#define L2CTL ((volatile u32 *) 0xffe20000) + +static void kom_init_cpu(void) +{ + printf("Init CPU\n\r"); + // I don't why but misc_32.S does not initialise L1 data + if (!(mfspr(SPRN_L1CSR0) & L1CSR0_DCE)) { + // Invalidate cache + mtspr(SPRN_L1CSR0, L1CSR0_DCFI); + do { + asm("msync"); + } while (mfspr(SPRN_L1CSR0) & L1CSR0_DCFI); + mtspr(SPRN_L1CSR0, 0x10001); + printf("L1 data cache enabled\n\r"); + } else + printf("L1 data cache already enabled\n\r"); + + // Should be useless, but just in case + if (!(mfspr(SPRN_L1CSR1) & L1CSR1_ICE)) { + // Invalidate cache + mtspr(SPRN_L1CSR1, L1CSR1_ICFI); + do { + asm("msync"); + } while (mfspr(SPRN_L1CSR1) & L1CSR1_ICFI); + mtspr(SPRN_L1CSR1,0x10001); + printf("L1 instruction cache enabled\n\r"); + } else + printf("L1 instruction cache already enabled\n\r"); + + // What is the goal? + asm("mbar 1"); + asm("isync"); + + // Reusing Kontron original method to initialize L2 + // but it is ugly + // TODO: ask to LKML why L2 is not initialized in misc_32.S + if (!((*L2CTL) & (1 << 31))) { + asm("msync;isync"); + *L2CTL = 0x68000000; // Invalidate + asm("msync;isync"); + *L2CTL = 0xa8000000; // Enable L2 cache + asm("msync;isync"); + printf("L2 cache enabled: "); + } else + printf("L2 cache already enabled: "); + + switch (((*L2CTL) >> (31 - 3)) & 0x3) { + case 1: + printf("128KB\n\r"); + break; + case 2: + printf("256KB\n\r"); + break; + default: + printf("unknown size\n\r"); + } + + + // Should be useless, but just in case + if (!(mfspr(SPRN_BUCSR) & 1)) { + /* Flash invalidate branch buffer */ + mtspr(SPRN_BUCSR, 1 << (63 - 54)); + /* Branch buffer lock bits clear */ + mtspr(SPRN_BUCSR, 1 << (63 - 57)); + /* Enable branch prediction */ + mtspr(SPRN_BUCSR, 1); + printf("Branch prediction enabled\n\r"); + } else + printf("Branch prediction already enabled\n\r"); +} + +/* + * Board configuration for KOM boards + */ +static void kom_init(void) +{ + struct bd_data pbd; + //int offset, i, size; + int memsize, busfreq, intfreq; //char * macaddr; + + if(get_i2c_board_data(&pbd)) + fatal("Cannot open i2c bus"); /* if CRC is not valid - exit */ + + if (pbd.bd1.num_macs != 4) + printf("Warning %d (instead of 4) mac addresses found\n\r", + pbd.bd1.num_macs); + dt_fixup_mac_address_by_alias("ethernet0", pbd.macs[0]); + dt_fixup_mac_address_by_alias("ethernet1", pbd.macs[1]); + dt_fixup_mac_address_by_alias("ethernet2", pbd.macs[2]); + dt_fixup_mac_address_by_alias("ethernet3", pbd.macs[3]); + + switch ((kom_fpga_base->mem_config >> 1) & 0x3) { + case 0: + memsize = 128 * 1024 * 1024; + break; + case 1: + memsize = 256 * 1024 * 1024; + break; + case 2: + memsize = 512 * 1024 * 1024; + break; + default: /* reserved - lets assume 128MBytes */ + memsize = 128 * 1024 * 1024; + } + if (pbd.bd0.main_mem_size != 0xffffffff) + memsize = pbd.bd0.main_mem_size; + dt_fixup_memory(0, memsize); + + /* Default values - in case if we have + * all 0xFFs */ + if (kom_fpga_base->mem_config & (1 << 5)) + busfreq = 330000000; + else + busfreq = 264000000; + { + u32 div; + div = (mfspr(SPRN_HID1)>>(63-39)) & 0x1f; + switch (div) { + case 4: + intfreq = busfreq * 2; + break; + case 5: + intfreq = busfreq * 5 / 2; + break; + case 6: + intfreq = busfreq * 3; + break; + case 7: + intfreq = busfreq * 7 / 2; + break; + default: + intfreq = busfreq; + } + } + if (pbd.bd1.freq_0 != 0xffffffff) + busfreq = pbd.bd1.freq_0; + if (pbd.bd1.freq_1 != 0xffffffff) + intfreq = pbd.bd1.freq_1; + dt_fixup_cpu_clocks(intfreq, busfreq / 8, busfreq); + kom_init_cpu(); +} + +void platform_specific_init(void) { + platform_ops.fixups = kom_init; +} diff --git a/arch/powerpc/boot/main.c b/arch/powerpc/boot/main.c index a28f021..cd474e4 100644 --- a/arch/powerpc/boot/main.c +++ b/arch/powerpc/boot/main.c @@ -149,8 +149,9 @@ static void prep_cmdline(void *chosen) printf("\n\rLinux/PowerPC load: %s", cmdline); /* If possible, edit the command line */ - if (console_ops.edit_cmdline) - console_ops.edit_cmdline(cmdline, COMMAND_LINE_SIZE); + // Udelay does not work, so edit_cmdline does not work. + //if (console_ops.edit_cmdline) + // console_ops.edit_cmdline(cmdline, COMMAND_LINE_SIZE); printf("\n\r"); /* Put the command line back into the devtree for the kernel */ @@ -168,7 +169,7 @@ void start(void) kernel_entry_t kentry; unsigned long ft_addr = 0; void *chosen; - + /* Do this first, because malloc() could clobber the loader's * command line. Only use the loader command line if a * built-in command line wasn't set by an external tool */ diff --git a/arch/powerpc/boot/reloc-head.S b/arch/powerpc/boot/reloc-head.S new file mode 100644 index 0000000..4e58219 --- /dev/null +++ b/arch/powerpc/boot/reloc-head.S @@ -0,0 +1,40 @@ +/* By Jezz -- Relocation for Kondron NetBootLoader */ +#include "ppc_asm.h" + + +/* From asm/reg.h */ +#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ +#define L1CSR1_ICLFR 0x00000100 /* Instr Cache Lock Bits Flash Reset */ +#define L1CSR1_ICFI 0x00000002 /* Instr Cache Flash Invalidate */ +#define L1CSR1_ICE 0x00000001 /* Instr Cache Enable */ + + + .text + .global _zimage_start +_zimage_start: + lis r6,_end@h + ori r6,r6,_end@l + lis r5,_start@h + ori r5,r5,_start@l + sub r6,r6,r5 + addi r6,r6,0x100 /* Contains size of zImage to relocate */ + + lis r5,0x0@h + ori r5,r5,0x0@l + lis r3,0x800000@h + ori r3,r3,0x800000@l + +loop: lwz r4,0(r5) + stw r4,0(r3) + addi r3,r3,4 + addi r5,r5,4 + cmplw r5,r6 + blt loop + lis r3,_zimage_start_lib@h + ori r3,r3,_zimage_start_lib@l + mtlr r3 + mfspr r3,SPRN_L1CSR1 + ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR + mtspr SPRN_L1CSR1,r3 + isync + b _zimage_start_lib + 0x800000 diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper index 965c237..e517ba6 100755 --- a/arch/powerpc/boot/wrapper +++ b/arch/powerpc/boot/wrapper @@ -38,6 +38,7 @@ dtb= dts= cacheit= binary= +kom_bootloader= gzip=.gz # cross-compilation prefix @@ -218,6 +219,11 @@ simpleboot-*) platformo="$object/simpleboot.o" binary=y ;; +kom-*) + platformo="$object/reloc-head.o $object/kom_fpga.o $object/simpleboot.o" + binary=y + kom_bootloader=y + ;; asp834x-redboot) platformo="$object/fixed-head.o $object/redboot-83xx.o" binary=y @@ -302,6 +308,9 @@ entry=`${CROSS}objdump -f "$ofile" | grep '^start address ' | cut -d' ' -f3` if [ -n "$binary" ]; then mv "$ofile" "$ofile".elf ${CROSS}objcopy -O binary "$ofile".elf "$ofile" + if [ -n "$kom_bootloader" ]; then + dd if="$ofile".elf of="$ofile".kom skip=255 bs=256 + fi fi # post-processing needed for some platforms diff --git a/arch/powerpc/configs/85xx/eb8541_defconfig b/arch/powerpc/configs/85xx/eb8541_defconfig new file mode 100644 index 0000000..f645ffd --- /dev/null +++ b/arch/powerpc/configs/85xx/eb8541_defconfig @@ -0,0 +1,1290 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.28.10 +# Wed Jul 15 16:12:34 2009 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +# CONFIG_6xx is not set +CONFIG_PPC_85xx=y +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_E500=y +# CONFIG_PPC_E500MC is not set +CONFIG_BOOKE=y +CONFIG_FSL_BOOKE=y +CONFIG_FSL_EMB_PERFMON=y +# CONFIG_PHYS_64BIT is not set +CONFIG_SPE=y +# CONFIG_PPC_MM_SLICES is not set +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_GPIO=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +CONFIG_PPC_UDBG_16550=y +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFAULT_UIMAGE=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +# CONFIG_FAIR_GROUP_SCHED is not set +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_MARKERS=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_CLK=y +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_MODULES is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y +# CONFIG_FREEZER is not set + +# +# Platform support +# +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PQ2ADS is not set +CONFIG_MPC85xx=y +CONFIG_EB8541=y +# CONFIG_MPC8540_ADS is not set +# CONFIG_MPC8560_ADS is not set +# CONFIG_MPC85xx_CDS is not set +# CONFIG_MPC85xx_MDS is not set +# CONFIG_MPC8536_DS is not set +# CONFIG_MPC85xx_DS is not set +# CONFIG_KSI8560 is not set +# CONFIG_STX_GP3 is not set +# CONFIG_TQM8540 is not set +# CONFIG_TQM8541 is not set +# CONFIG_TQM8548 is not set +# CONFIG_TQM8555 is not set +# CONFIG_TQM8560 is not set +# CONFIG_SBC8548 is not set +# CONFIG_SBC8560 is not set +# CONFIG_IPIC is not set +CONFIG_MPIC=y +# CONFIG_MPIC_WEIRD is not set +# CONFIG_PPC_I8259 is not set +# CONFIG_PPC_RTAS is not set +# CONFIG_MMIO_NVRAM is not set +# CONFIG_PPC_MPC106 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +# CONFIG_CPU_FREQ is not set +# CONFIG_QUICC_ENGINE is not set +CONFIG_CPM2=y +# CONFIG_FSL_ULI1575 is not set +CONFIG_CPM=y +# CONFIG_MPC8xxx_GPIO is not set + +# +# Kernel options +# +# CONFIG_HIGHMEM is not set +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_MATH_EMULATION=y +# CONFIG_IOMMU_HELPER is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_HAS_WALK_MEMORY=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MIGRATION=y +# CONFIG_RESOURCES_64BIT is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_UNEVICTABLE_LRU=y +CONFIG_FORCE_MAX_ZONEORDER=11 +# CONFIG_PROC_DEVICETREE is not set +# CONFIG_CMDLINE_BOOL is not set +CONFIG_EXTRA_TARGETS="" +# CONFIG_PM is not set +CONFIG_SECCOMP=y +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +CONFIG_ZONE_DMA=y +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_FSL_SOC=y +CONFIG_FSL_PCI=y +CONFIG_PPC_PCI_CHOICE=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_SYSCALL=y +# CONFIG_PCIEPORTBUS is not set +CONFIG_ARCH_SUPPORTS_MSI=y +# CONFIG_PCI_MSI is not set +CONFIG_PCI_LEGACY=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set +# CONFIG_HAS_RAPIDIO is not set + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_PAGE_OFFSET=0xc0000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_PHYSICAL_START=0x00000000 +CONFIG_PHYSICAL_ALIGN=0x10000000 +CONFIG_TASK_SIZE=0xc0000000 +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=y +CONFIG_INET6_XFRM_MODE_TUNNEL=y +CONFIG_INET6_XFRM_MODE_BEET=y +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=y +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_PHONET is not set +# CONFIG_WIRELESS is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_RAM=y +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +# CONFIG_MTD_PHYSMAP is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +CONFIG_OF_DEVICE=y +CONFIG_OF_GPIO=y +CONFIG_OF_I2C=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_HD is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +CONFIG_IDE=y + +# +# Please see Documentation/ide/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +# CONFIG_IDE_GD is not set +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y + +# +# IDE chipset support/bugfixes +# +CONFIG_BLK_DEV_PLATFORM=y + +# +# PCI IDE chipsets support +# +# CONFIG_BLK_DEV_GENERIC is not set +# CONFIG_BLK_DEV_OPTI621 is not set +# CONFIG_BLK_DEV_AEC62XX is not set +# CONFIG_BLK_DEV_ALI15X3 is not set +# CONFIG_BLK_DEV_AMD74XX is not set +# CONFIG_BLK_DEV_CMD64X is not set +# CONFIG_BLK_DEV_TRIFLEX is not set +# CONFIG_BLK_DEV_CS5520 is not set +# CONFIG_BLK_DEV_CS5530 is not set +# CONFIG_BLK_DEV_HPT366 is not set +# CONFIG_BLK_DEV_JMICRON is not set +# CONFIG_BLK_DEV_SC1200 is not set +# CONFIG_BLK_DEV_PIIX is not set +# CONFIG_BLK_DEV_IT8213 is not set +# CONFIG_BLK_DEV_IT821X is not set +# CONFIG_BLK_DEV_NS87415 is not set +# CONFIG_BLK_DEV_PDC202XX_OLD is not set +# CONFIG_BLK_DEV_PDC202XX_NEW is not set +# CONFIG_BLK_DEV_SVWKS is not set +# CONFIG_BLK_DEV_SIIMAGE is not set +# CONFIG_BLK_DEV_SL82C105 is not set +# CONFIG_BLK_DEV_SLC90E66 is not set +# CONFIG_BLK_DEV_TRM290 is not set +# CONFIG_BLK_DEV_VIA82CXXX is not set +# CONFIG_BLK_DEV_TC86C001 is not set +# CONFIG_BLK_DEV_IDEDMA is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# Enable only one of the two stacks, unless you know what you are doing +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_LXT_PHY=y +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +CONFIG_MDIO_BITBANG=y +# CONFIG_MDIO_OF_GPIO is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_NET_PCI is not set +# CONFIG_B44 is not set +# CONFIG_ATL2 is not set +CONFIG_FS_ENET=y +# CONFIG_FS_ENET_HAS_SCC is not set +CONFIG_FS_ENET_HAS_FCC=y +CONFIG_FS_ENET_MDIO_FCC=y +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +CONFIG_GIANFAR=y +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +# CONFIG_JME is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_NR_UARTS=6 +CONFIG_SERIAL_8250_RUNTIME_UARTS=6 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_CPM is not set +# CONFIG_SERIAL_JSM is not set +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_CPM=y +# CONFIG_I2C_GPIO is not set +CONFIG_I2C_MPC=y +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set + +# +# Graphics adapter I2C/DDC channel drivers +# +# CONFIG_I2C_VOODOO3 is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +CONFIG_AT24=y +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# +# CONFIG_GPIO_XILINX is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# +# CONFIG_GPIO_BT8XX is not set + +# +# SPI GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +CONFIG_SENSORS_LM75=y +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_REGULATOR is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_UWB is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +CONFIG_RTC_DRV_M41T80=y +# CONFIG_RTC_DRV_M41T80_WDT is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PPC is not set +# CONFIG_DMADEVICES is not set +# CONFIG_UIO is not set +# CONFIG_STAGING is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +CONFIG_FILE_LOCKING=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +# CONFIG_NFS_FS is not set +# CONFIG_NFSD is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_NLS is not set +# CONFIG_DLM is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_HAVE_LMB=y + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FUNCTION_TRACER=y + +# +# Tracers +# +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_BOOT_TRACER is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_DEBUG_STACKOVERFLOW is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_CODE_PATCHING_SELFTEST is not set +# CONFIG_FTR_FIXUP_SELFTEST is not set +# CONFIG_MSI_BITMAP_SELFTEST is not set +# CONFIG_XMON is not set +# CONFIG_IRQSTACKS is not set +# CONFIG_VIRQ_DEBUG is not set +CONFIG_BDI_SWITCH=y +CONFIG_PPC_EARLY_DEBUG=y +# CONFIG_PPC_EARLY_DEBUG_LPAR is not set +# CONFIG_PPC_EARLY_DEBUG_G5 is not set +# CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set +# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set +# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set +# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set +# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set +# CONFIG_PPC_EARLY_DEBUG_BEAT is not set +# CONFIG_PPC_EARLY_DEBUG_44x is not set +# CONFIG_PPC_EARLY_DEBUG_40x is not set +# CONFIG_PPC_EARLY_DEBUG_CPM is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=y + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +CONFIG_CRYPTO_DEV_TALITOS=y +CONFIG_PPC_CLOCK=y +CONFIG_PPC_LIB_RHEAP=y +# CONFIG_VIRTUALIZATION is not set diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index b79dc71..816199f 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig @@ -10,6 +10,12 @@ menuconfig MPC85xx if MPC85xx +config EB8541 + bool "Kontron EB8541" + select DEFAULT_UIMAGE + help + This option enables support for the Kontron EB8541 board + config MPC8540_ADS bool "Freescale MPC8540 ADS" select DEFAULT_UIMAGE diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index cb3054e..85a2e58 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile @@ -12,3 +12,4 @@ obj-$(CONFIG_TQM85xx) += tqm85xx.o obj-$(CONFIG_SBC8560) += sbc8560.o obj-$(CONFIG_SBC8548) += sbc8548.o obj-$(CONFIG_KSI8560) += ksi8560.o +obj-$(CONFIG_EB8541) += eb8541.o diff --git a/arch/powerpc/platforms/85xx/eb8541.c b/arch/powerpc/platforms/85xx/eb8541.c new file mode 100644 index 0000000..2696209 --- /dev/null +++ b/arch/powerpc/platforms/85xx/eb8541.c @@ -0,0 +1,327 @@ +/* + * Konron EB8541 setup and early boot code + * + * Inspired from mpc85xx_ads.c + * + * Copyright 2009 Jérôme Pouiller + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#ifdef CONFIG_CPM2 +#include +#include +#endif + +#include + +#ifdef CONFIG_PCI +static int mpc85xx_exclude_device(struct pci_controller *hose, + u_char bus, u_char devfn) +{ + if (bus == 0 && PCI_SLOT(devfn) == 0) + return PCIBIOS_DEVICE_NOT_FOUND; + else + return PCIBIOS_SUCCESSFUL; +} +#endif /* CONFIG_PCI */ + +#ifdef CONFIG_CPM2 + +static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) +{ + int cascade_irq; + + while ((cascade_irq = cpm2_get_irq()) >= 0) + generic_handle_irq(cascade_irq); + + desc->chip->eoi(irq); +} + +#endif /* CONFIG_CPM2 */ + +static void __init eb8541_pic_init(void) +{ + struct mpic *mpic; + struct resource r; + struct device_node *np = NULL; +#ifdef CONFIG_CPM2 + int irq; +#endif + + np = of_find_node_by_type(np, "open-pic"); + if (!np) { + printk(KERN_ERR "Could not find open-pic node\n"); + return; + } + + if (of_address_to_resource(np, 0, &r)) { + printk(KERN_ERR "Could not map mpic register space\n"); + of_node_put(np); + return; + } + + mpic = mpic_alloc(np, r.start, + MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, + 0, 256, " OpenPIC "); + BUG_ON(mpic == NULL); + of_node_put(np); + + mpic_init(mpic); + +#ifdef CONFIG_CPM2 + /* Setup CPM2 PIC */ + np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic"); + if (np == NULL) { + printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n"); + return; + } + irq = irq_of_parse_and_map(np, 0); + + cpm2_pic_init(np); + of_node_put(np); + set_irq_chained_handler(irq, cpm2_cascade); +#endif + init_kom_fpga(); +} + +/* + * Setup the architecture + */ +#ifdef CONFIG_CPM2 +struct cpm_pin { + int port, pin, flags; +}; + +static const struct cpm_pin eb8541_pins[] = { + /* FCC1 */ + {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, + {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, + {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, + {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, + {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, + {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, + {0, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY | CPM_PIN_GPIO}, + {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK21 */ + {2, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK20 */ + + /* FCC2 */ + {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, + {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK19 */ + {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK18 */ +}; + +static void __init init_cpm2_ioports(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(eb8541_pins); i++) { + const struct cpm_pin *pin = &eb8541_pins[i]; + cpm2_set_pin(pin->port, pin->pin, pin->flags); + } + cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK12, CPM_CLK_RX); + cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_TX); + cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK15, CPM_CLK_RX); + cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX); +} +#endif + +static void __init eb8541_setup_arch(void) +{ +#ifdef CONFIG_PCI + struct device_node *np; +#endif + + if (ppc_md.progress) + ppc_md.progress("eb8541_setup_arch()", 0); + +#ifdef CONFIG_CPM2 + cpm2_reset(); + init_cpm2_ioports(); +#endif + + if (ppc_md.progress) + ppc_md.progress("Init CPM2 done", 0); + +#ifdef CONFIG_PCI + for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") + fsl_add_bridge(np, 1); + + ppc_md.pci_exclude_device = mpc85xx_exclude_device; +#endif +} + +static void eb8541_show_cpuinfo(struct seq_file *m) +{ + uint pvid, svid, phid1; + + pvid = mfspr(SPRN_PVR); + svid = mfspr(SPRN_SVR); + + seq_printf(m, "Vendor\t\t: Kontron\n"); + seq_printf(m, "PVR\t\t: 0x%x\n", pvid); + seq_printf(m, "SVR\t\t: 0x%x\n", svid); + + /* Display cpu Pll setting */ + phid1 = mfspr(SPRN_HID1); + seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); +} + +static struct of_device_id __initdata of_bus_ids[] = { + { .name = "soc", }, + { .type = "soc", }, + { .name = "cpm", }, + { .name = "localbus", }, + { .compatible = "simple-bus", }, + {}, +}; + +static int __init declare_of_platform_devices(void) +{ + of_platform_bus_probe(NULL, of_bus_ids, NULL); + + return 0; +} +machine_device_initcall(eb8541, declare_of_platform_devices); + +/* + * Called very early, device-tree isn't unflattened + */ +static int __init eb8541_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); + + return of_flat_dt_is_compatible(root, "EB8541"); +} + +static void eb8541_restart(char *cmd) +{ + local_irq_disable(); + writeb(readb(&fpga_immr->gp_control) | 0x10, &(fpga_immr->gp_control)); + for(;;); +} + +static void eb8541_halt(void) +{ + local_irq_disable(); + for(;;); +} + +define_machine(eb8541) { + .name = "EB8541", + .probe = eb8541_probe, + .setup_arch = eb8541_setup_arch, + .init_IRQ = eb8541_pic_init, + .show_cpuinfo = eb8541_show_cpuinfo, + .get_irq = mpic_get_irq, + .restart = eb8541_restart, + .power_off = eb8541_halt, + .halt = eb8541_halt, + .calibrate_decr = generic_calibrate_decr, + .progress = udbg_progress, +}; + +/* Sram stuff */ + +struct map_info ebrain_sram_map = { + .name = "E2Brain SRAM", + .bankwidth = 4, +}; +static struct mtd_partition sram_partition_info[] = { + { + .name = "SRAM", + }, +}; +static struct mtd_info *eb_sram_mtd; + +static int __init eb8541_init_sram(void) +{ + struct resource r; + struct device_node *np; + + np = of_find_node_by_type(NULL, "sram"); + if (np == NULL) { + printk(KERN_ERR "Can not find sram node\n"); + return -ENODEV; + } + if (of_address_to_resource(np, 0, &r)) { + printk(KERN_ERR "Could not map sram register space\n"); + of_node_put(np); + return -ENODEV; + } + of_node_put(np); + + ebrain_sram_map.size = resource_size(&r); + ebrain_sram_map.phys = r.start; + ebrain_sram_map.virt = ioremap(r.start, resource_size(&r)); + if (!ebrain_sram_map.virt) { + printk("E2BRAIN: ioremap of SRAM failed\n"); + return -EIO; + } + + simple_map_init(&ebrain_sram_map); + + eb_sram_mtd = do_map_probe("map_ram", &ebrain_sram_map); + if (!eb_sram_mtd) { + iounmap(ebrain_sram_map.virt); + printk("E2BRAIN: SRAM probing failed\n"); + return -ENXIO; + } + + add_mtd_partitions(eb_sram_mtd, sram_partition_info, + sizeof(sram_partition_info)/sizeof(struct mtd_partition)); + return 0; +} +late_initcall(eb8541_init_sram); + + diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 5afce11..716f958 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -45,6 +45,7 @@ obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o obj-$(CONFIG_PPC_DCR) += dcr.o obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o obj-$(CONFIG_UCODE_PATCH) += micropatch.o +obj-$(CONFIG_EB8541) += kom_fpga.o kom_ide.o ifeq ($(CONFIG_SUSPEND),y) obj-$(CONFIG_6xx) += 6xx-suspend.o diff --git a/arch/powerpc/sysdev/kom_fpga.c b/arch/powerpc/sysdev/kom_fpga.c new file mode 100644 index 0000000..3e7f419 --- /dev/null +++ b/arch/powerpc/sysdev/kom_fpga.c @@ -0,0 +1,557 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +kom_fpga_regs_t __iomem *fpga_immr; +int wd_irq = -1; + +static struct irq_host *miscf_host; + +static void miscf_cascade(unsigned int irq, struct irq_desc *desc) +{ + int i; + + for(i = 0; i < 4; i++) { + //if (test_bit(i + 4, &(fpga_immr->dev_int_pending))) { + if (readb(&fpga_immr->dev_int_pending) & (1 << (i + 4))) { + printk("x%d ", irq_linear_revmap(miscf_host, i)); + generic_handle_irq(irq_linear_revmap(miscf_host, i)); + } + } + desc->chip->eoi(irq); +} + +static void miscf_mask_irq(unsigned int virq) +{ + printk("m"); + if (virq == 20) { + //clear_bit(4, &fpga_immr->dev_int_mask); + writeb(readb(&(fpga_immr->dev_int_mask)) & ~0x10, &fpga_immr->dev_int_mask); + //mb(); + } else if (virq == 21){ + //clear_bit(5, &fpga_immr->dev_int_mask); + writeb(readb(&(fpga_immr->dev_int_mask)) & ~0x20, &fpga_immr->dev_int_mask); + //mb(); + } else { + printk("Error in masking IRQ %d\n", virq); + } +} + +static void miscf_unmask_irq(unsigned int virq) +{ + printk("u"); + if (virq == 20) { + //set_bit(4, &fpga_immr->dev_int_mask); + writeb(readb(&(fpga_immr->dev_int_mask)) | 0x10, &fpga_immr->dev_int_mask); + //mb(); + } else if (virq == 21) { + //set_bit(5, &fpga_immr->dev_int_mask); + writeb(readb(&(fpga_immr->dev_int_mask)) | 0x20, &fpga_immr->dev_int_mask); + //mb(); + } else { + printk("Error in unmasking IRQ %d\n", virq); + } +} + +static void miscf_end_irq(unsigned int virq) +{ + if (!(get_irq_desc(virq)->status & (IRQ_DISABLED|IRQ_INPROGRESS)) + && get_irq_desc(virq)->action) + miscf_unmask_irq(virq); +} + +static struct hw_interrupt_type miscdemux = { + .typename = "misc-demux", + .enable = miscf_unmask_irq, + .disable = miscf_mask_irq, + .ack = miscf_mask_irq, + .end = miscf_end_irq, +}; + +static int miscf_host_map(struct irq_host *h, unsigned int virq, + irq_hw_number_t hw) +{ + get_irq_desc(virq)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(virq, &miscdemux, handle_level_irq); + return 0; +} + +static struct irq_host_ops miscf_host_ops = { + .map = miscf_host_map, +}; + +/* Watchdog stuff */ + +#define NUM_WDT_TIMEVALUES 12 +static int kom_wdt_timevalues[NUM_WDT_TIMEVALUES+1] = { + NUM_WDT_TIMEVALUES, + 1, /* 0,125 sec */ + 2, /* 0,250 sec */ + 4, /* 0,500 sec */ + 8, /* 1 sec */ + 16, /* 2 sec */ + 32, /* 4 sec */ + 64, /* 8 sec */ + 128, /* 16 sec */ + 256, /* 32 sec */ + 512, /* 64 sec */ + 1024, /* 128 sec */ + 2048, /* 256 sec */ +}; + +static int device_open = 0; +static struct task_struct * process; + +/**************************************************** + * This is the Watchdog IRQ Handler + * it is called, if Watchdog is configured to IRQ + * when a Watchdog timeout occurs + * + * This function could be modified by the user + * if a different behavior is required + */ +static irqreturn_t kom_wdt_interrupt(int this_irq, void *dev_id) +{ + struct siginfo info; + + /* checking the IRQ source - watchdog? */ + if (readb(&fpga_immr->wd_control) & KOMREG_WDEVENT_TIMOUT) { + writeb(readb(&fpga_immr->wd_control) | 0x80, &fpga_immr->wd_control); + //set_bit(7, &fpga_immr->wd_control); + info.si_signo=this_irq; + info.si_errno=0; + info.si_code=SI_USER; + info.si_pid=process->pid; + info.si_uid=process->uid; + send_sig_info(SIGUSR2, &info, process); + } + + return IRQ_HANDLED; +} + +static void kom_wdt_trigger(void) +{ + if (readb(&fpga_immr->wd_control) & KOMREG_WDCONF_EN) + writeb(readb(&fpga_immr->wd_control) | KOMREG_WDCONF_TRG, &fpga_immr->wd_control); + //if (test_bit(4, &fpga_immr->wd_control)) + // set_bit(4, &fpga_immr->wd_control); +} + +/******************************************************************************* +* +* komwdtai_open - called when opening the device file. +* Needed for NMI/IRQ handling. +* +* Only one user is allowed. This is mainly to prevent from sending signal from +* ISR to process that does not exists. +*/ +static int komwdtai_open(struct inode *inode, struct file *file) +{ + static int first_time = 1; + // FIXME: Device can be open two time + if (device_open != 0) + return -EBUSY; + + device_open++; + + if (first_time) { + first_time = 0; + } + else { + enable_irq(wd_irq); + } + + return 0; +} + +/******************************************************************************* +* +* komwdtai_close - called when closing the device file. +* Needed for NMI/IRQ handling. +* +* Only one user is allowed. This is mainly to prevent from sending signal from +* ISR to process that does not exists. +*/ +static int komwdtai_close(struct inode *inode, struct file *file) +{ + disable_irq(wd_irq); + device_open--; + + return 0; +} + +/******************************************************************************* +* +* komwdtai_write - enables watchdog and retriggers timer +* +* This function handles write operation on watchdog device. It retrigers +* watchdog timer. +* +* RETURNS +* -ESPIPE - error caused by attempt to seek device +* 1 - timer retriggered +* 0 - called with null data - watchdog not modified +* +*/ +static ssize_t komwdtai_write(struct file *file, const char *data, size_t len, loff_t *ppos) +{ + /* Can't seek (pwrite) on this device */ + if (ppos != &file->f_pos) + return -ESPIPE; + + /* Refresh the timer. */ + if(len) { + kom_wdt_trigger(); + return 1; + } + return 0; +} + +#define WDIO_GS_OPT_IRQ 0x0001 /* Supports Routing to IRQ */ +#define WDIO_GS_OPT_NMI 0x0002 /* Supports Routing to NMI */ +#define WDIO_GS_OPT_RES 0x0004 /* Supports Routing to RES */ +/*#define WDIO_GS_OPT_CCD 0x0008 obsolete */ +#define WDIO_GS_OPT_NMI_RES 0x0008 /* Supports Cascade Mode NMI/Reset */ +#define WDIO_GS_OPT_HS 0x0010 /* supports Hot Swap switch */ +#define WDIO_GS_OPT_TIMEOUT 0x0020 /* supports timeout */ +#define WDIO_GS_OPT_IRQ_RES 0x0040 /* Supports Cascade Mode IRQ5/Reset */ +static int kom_wdt_setroute(unsigned int route) +{ + unsigned char wd_status; + + /* we want routing to be set only once! */ + if ( (wd_status = readb(&fpga_immr->wd_control)) & WDT_ROUTE_BIT_MASK) + return -EPERM; + + wd_status &= ~WDT_ROUTE_BIT_MASK; + + switch (route) { + case WDIO_GS_OPT_NMI: + return -EINVAL; + break; + + case WDIO_GS_OPT_RES: + //set_bit(5, &fpga_immr->wd_control); + wd_status |= KOMREG_INTROUT_WDRESET; + break; + + case WDIO_GS_OPT_TIMEOUT: + //writeb(readb(&fpga_immr->wd_control) & KOMREG_WDEVENT_TIMOUT, &fpga_immr->wd_control); + //wd_status |= KOMREG_INTROUT_WDTIMEOUT; + break; + + case WDIO_GS_OPT_IRQ: + //set_bit(6, &fpga_immr->wd_control); + wd_status |= KOMREG_INTROUT_WDIRQ; + break; + + case WDIO_GS_OPT_IRQ_RES: + //atomic_set_mask(0x60, &fpga_immr->wd_control); + wd_status |= KOMREG_INTROUT_WDIRQRES; + break; + + case WDIO_GS_OPT_NMI_RES: + //wd_status |= KOMREG_INTROUT_WDNMIRES; + break; + + default: + return -EINVAL; + } + writeb(wd_status, &fpga_immr->wd_control); + return 0; +} + +/* +* +* This driver responds to the following requests: +* +* WDIOC_GETSUPPORT : +* Returns an identification string, firmware version and +* options in the watchdog_info structure +* +* WDIOC_GETSTATUS and WDIOC_GETBOOTSTATUS : +*  Returns the value of WTE bit in Watchdog Control register +* +* WDIOC_KEEPALIVE : Retriggers timer if watchdog is enabled. +* +* WDIOC_TIMEVALUES : +* Returns a array with +* kom_wdt_timevalues[0] = number of supported timevalues +* kom_wdt_timevalues[1..n] = supported Watchdog delays +* +* WDIOC_NUMLEDS : +* Returns the number of general purpose LEDs on the board +* +* WDIOC_SETOPTIONS +* Set options where has following structure: +* 31 16|15 8|7 0 +* reserved |option code|option parameter +* +*